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Hardware Design Considerations
3.2
Power Supply Design Considerations
Each PLL supply must have an external RC filter for the V DDPLL input. The filter is a 10 Ω resistor in series with two 2.2 μ F,
low ESL (<0.5 nH) and low ESR capacitors. All three PLLs can connect to a single supply voltage source (such as a voltage
regulator) as long as the external RC filter is applied to each PLL separately (see Figure 43 ). For optimal noise filtering, place
the circuit as close as possible to its V DDPLL inputs. These traces should be short and direct.
MSC8144
Voltage Regulator
2.2 μ F
10 Ω
2.2 μ F
V DDPLL0
10 Ω
V DDPLL0
2.2 μ F
2.2 μ F
2.2 μ F
10 Ω
2.2 μ F
V DDPLL0
Figure 43. PLL Supplies
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 16
66
Freescale Semiconductor
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